Analysis and Synthesis of Single-Bit Adders for Multi-Bit Adders with Sequential Transfers-Reference-Cited by-同舟云学术

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Analysis and Synthesis of Single-Bit Adders for Multi-Bit Adders with Sequential Transfers

Published:2024-07-24 Issue: Volume:47 Page:6
ISSN:
Container-title:EEPES 2024
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Author:

Tynymbayev Sakhybay¹,Mukasheva Assel²^ORCID,Ibragimov Kuanyshbek³,Mukhamedgali Adil²,Sergazin Gani⁴^ORCID,Iliev Teodor⁵^ORCID

Affiliation:

1. International University of Information Technology, Almaty 050013, Kazakhstan

2. School of Information Technology and Engineering, Kazakh-British Technical University, Almaty 050000, Kazakhstan

3. Kazakh National University named after Al-Farabi, Almaty 050040, Kazakhstan

4. Academy of Logistics and Transport, Almaty 050012, Kazakhstan

5. Department of Telecommunications, University of Ruse, 7004 Ruse, Bulgaria

Publisher

MDPI

Link

https://www.mdpi.com/2673-4591/70/1/6/pdf

Reference14 articles.

1. Ugryumov, E.P. (2005). Digital Circuitry: Textbook. Handbook for Universities, BHV-Petersburg. [2nd ed.].

2. Lekhin, S.N. (2010). L52 Computer Circuitry, BHV-Petersburg.

3. Ercegovac, M.D., and Lang, T. (2004). Digital Arithmetic, Morgan Kaufmann Publishers.

4. Kartsev, M.A. (1969). Arithmetic of Digital Machines, Publishing House “SCIENCE”.

5. De Dinechin, F., Ercegovac, M.D., Muller, J.-M., and Revol, N. (2009). Digital Arithmetic, Wiley Encyclopedia of Computer Science and Engineering.

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