Power and Signal-to-Noise Ratio Optimization in Mesh-Based Hybrid Optical Network-on-Chip using Semiconductor Optical Amplifiers

Author:

Jang Jun Yeong,Kim Min Su,Li Chang-Lin,Han Tae HeeORCID

Abstract

To address the performance bottleneck in metal-based interconnects, hybrid optical network-on-chip (HONoC) has emerged as a new alternative. However, as the size of the HONoC grows, insertion loss and crosstalk noise increase, leading to excessive laser source output power and performance degradation. Therefore, we propose a low-power scalable HONoC architecture by incorporating semiconductor optical amplifiers (SOAs). An SOA placement algorithm is developed considering insertion loss and crosstalk noise. Furthermore, we establish a worst-case crosstalk noise model of SOA-enabled HONoC and induce optimized SOA gains with respect to power consumption and performance, respectively. Extensive simulations for worst-case signal-to-noise ratio (SNR) and power consumption are conducted under various traffic patterns and different network sizes. Simulation results show that the proposed SOA-enabled HONoC architecture and the associated algorithm help sustain the performance as network size increases without additional laser source power.

Funder

Ministry of Trade, Industry and Energy

National Research Foundation of Korea

Publisher

MDPI AG

Subject

Fluid Flow and Transfer Processes,Computer Science Applications,Process Chemistry and Technology,General Engineering,Instrumentation,General Materials Science

Reference30 articles.

1. International Technology Roadmap for Semiconductorshttp://www.itrs2.net

2. Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors

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