Hardware Implementation of an Approximate Simplified Piecewise Linear Spiking Neuron

Abstract

Artificial intelligence has revolutionized image and speech recognition, but the neural network fitting method has limitations. Neuromorphic chips that mimic biological neurons can better simulate the brain’s information processing mechanism. As the basic computing component of the new neuromorphic network, the new neural computing unit’s design and implementation have important significance; however, complex dynamical features come with a high computational cost: approximate computing has unique advantages, in terms of optimizing the computational cost of neural networks, which can solve this problem. This paper proposes a hardware implementation of an approximate spiking neuron structure, based on a simplified piecewise linear model (SPWL), to optimize power consumption and area. The proposed structure can achieve five major neuron spiking generation patterns. The proposed design was synthesized and compared to similar designs, to evaluate its potential advantages and limitations. The results showed that the approximate spiking neuron had the lowest computational cost and the fastest computation speed. A typical spiking neural network was constructed, to test the usability of the SPWL model. The results showed that the proposed approximate spiking neuron could work normally in the spiking neural network, and achieved an accuracy of 94% on the MNIST dataset.