Affiliation:
1. School of Information and Electronics, Advanced Research Institute of Multidisciplinary Science (ARIMS), Beijing Institute of Technology, Beijing 100081, China
2. Beijing Tasson Technology Co., Ltd., Beijing 100176, China
Abstract
The rapid advancement of millimeter-wave communication technology has presented new challenges for time synchronization, driven by the need for high-speed and low-latency data transmission. Ethernet synchronization technologies, such as Precise Time Protocol (PTP), have emerged to overcome the limitations of point-to-point architecture and enable precise synchronization across multiple devices. A key drawback of conventional PTP is its reliance on symmetric packet exchange delays, which may not hold in real-world scenarios where there is relative mobility between master and slave nodes, leading to asymmetric propagation delays and clock offset errors. To address this issue, a novel clock synchronization protocol that integrates Chinese Remainder Theory (CRT) has been proposed. This protocol enhances conventional PTP by incorporating distance estimation based on CRT using multi-carrier phase measurement. By combining a coarse estimation of one-way propagation delay from conventional PTP with a fine estimation of remainder distance from CRT, the protocol accurately determines the distance between master and slave nodes, reducing motion errors and enhancing clock synchronization accuracy. Simulation results indicate that the Root Mean Square Error (RMSE) of distance estimation remains below 10−5 m, with a corresponding motion time error of approximately 0.01 picosecond.