Vectorization Programming Based on HR DSP Using SIMD

Author:

Xie Chunhu1,Wu Huachun12,Zhou Jian1

Affiliation:

1. School of Mechanical and Electronic Engineering, Wuhan University of Technology, Wuhan 430070, China

2. Hubei Provincial Engineering Technology Research Center for Magnetic Suspension, Wuhan 430070, China

Abstract

Single instruction multiple data (SIMD) vector extension has become an essential feature of high-performance processors. Architectures such as x86, ARM, MIPS, and PowerPC have specific vector extension instruction sets and SIMD micro-architectures. Using SIMD vectorization programming can significantly improve the performance of application algorithms while keeping the hardware overhead low. In addition, other methods can enhance algorithm performance, such as selecting the best SIMD vectorization model for algorithms, ensuring sufficient instruction streams, implementing reasonable and effective cache data prefetching, and aligning data access and storage addresses according to instruction characteristics. The goal of this paper is three-fold. First, we introduce the basic structural characteristics of a general RISC processor, Hua Rui (HR) DSP, with a custom vector instruction set based on compatibility with an MIPS64 fixed-point and floating-point instruction set, as well as a Fei Teng (FT) processor compatible with an ARMv8 instruction set. Second, we summarize the fundamental principles of SIMD vectorization programming design for the HR DSP, which provides ideas for other scholars or engineering and technical personnel to study the algorithm performance using SIMD vectorization optimization. Third, we implement representative typical algorithms based on the HR and FT platforms and obtain experimental results that show improvement in algorithm SIMD vectorization optimization according to the vector programming design principles summarized in this article can improve the single-core performance of scalar implementation without vectorization, instruction streams, and cache data prefetching by 4–22 times for mean filter, accumulation, and matrix–matrix multiplication, which is significantly better than the performance improvement of 3–13 times for the FT platform. Moreover, the performance of matrix–matrix multiplication using the best vectorization model on the HR platform is about 84% higher than that of the common SIMD vectorization model.

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering

Reference14 articles.

1. SIMD programming using Intel vector extensions;Amiri;J. Parallel Distrib. Comput.,2020

2. MMX technology extension to the intel architecture;Peleg;IEEE Micro,1996

3. Slingerland, N.T., and Smith, A.J. (2000). Multimedia Instruction Sets for General Purpose Microprocessors: A Survey, Computer Science Division, University of California. Report No. UCB/CSD-00-1124.

4. AMD 3DNow! technology: Architecture and implementations;Oberman;IEEE Micro,1999

5. Mueller, Multimedia Extensions for a 550-MHz RISC Microprocessor;Carlson;IEEE J. Solid-State Circuits,1997

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