Common-Mode Voltage Reduction Algorithm for Photovoltaic Grid-Connected Inverters with Virtual-Vector Model Predictive Control

Abstract

Model predictive control (MPC) has been proven to offer excellent model-based, highly dynamic control performance in grid converters. The increasingly higher power capacity of a PV inverter has led to the industrial preference of adopting higher DC voltage design at the PV array (e.g., 750–1500 V). With high array voltage, a single stage inverter offers advantages of low component count, simpler topology, and requiring less control tuning effort. However, it is typically entailed with the issue of high common-mode voltage (CMV). This work proposes a virtual-vector model predictive control method equipped with an improved common-mode reduction (CMR) space vector pulse width modulation (SVPWM). The modulation technique essentially subdivides the hexagonal voltage vector space into 18 sub-sectors, that can be split into two groups with different CMV properties. The proposal indirectly increases the DC-bus utilization and extends the overall modulation region with improved CMV. The comparison with the virtual-vector MPC scheme equipped with the conventional SVPWM suggests that the proposed technique can effectively suppress 33.33% of the CMV, and reduce the CMV toggling frequency per fundamental cycle from 6 to either 0 or 2 (depending on which sub-sector group). It is believed that the proposed control technique can help to improve the performance of photovoltaic single-stage inverters.