FPGA Implementation of Pillar-Based Object Classification for Autonomous Mobile Robot

Author:

Park Chaewoon1ORCID,Lee Seongjoo23ORCID,Jung Yunho14ORCID

Affiliation:

1. School of Electronics and Information Engineering, Korea Aerospace University, Goyang-si 10540, Republic of Korea

2. Department of Electrical Engineering, Sejong University, Seoul 05006, Republic of Korea

3. Department of Convergence Engineering of Intelligent Drone, Sejong University, Seoul 05006, Republic of Korea

4. Department of Smart Air Mobility, Korea Aerospace University, Goyang-si 10540, Republic of Korea

Abstract

With the advancement in artificial intelligence technology, autonomous mobile robots have been utilized in various applications. In autonomous driving scenarios, object classification is essential for robot navigation. To perform this task, light detection and ranging (LiDAR) sensors, which can obtain depth and height information and have higher resolution than radio detection and ranging (radar) sensors, are preferred over camera sensors. The pillar-based method employs a pillar feature encoder (PFE) to encode 3D LiDAR point clouds into 2D images, enabling high-speed inference using 2D convolutional neural networks. Although the pillar-based method is employed to ensure real-time responsiveness of autonomous driving systems, research on accelerating the PFE is not actively being conducted, although the PFE consumes a significant amount of computation time within the system. Therefore, this paper proposes a PFE hardware accelerator and pillar-based object classification model for autonomous mobile robots. The proposed object classification model was trained and tested using 2971 datasets comprising eight classes, achieving a classification accuracy of 94.3%. The PFE hardware accelerator was implemented in a field-programmable gate array (FPGA) through a register-transfer level design, which achieved a 40 times speedup compared with the firmware for the ARM Cortex-A53 microprocessor unit; the object classification network was implemented in the FPGA using the FINN framework. By integrating the PFE and object classification network, we implemented a real-time pillar-based object classification acceleration system on an FPGA with a latency of 6.41 ms.

Funder

Institute of Information & Communications Technology Planning & Evaluation

Publisher

MDPI AG

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