Built-In Functional Testing of Analog In-Memory Accelerators for Deep Neural Networks

Author:

Mishra  Abhishek Kumar,Das Anup Kumar,Kandasamy NagarajanORCID

Abstract

The paper develops a methodology for the online built-in self-testing of deep neural network (DNN) accelerators to validate the correct operation with respect to their functional specifications. The DNN of interest is realized in the hardware to perform in-memory computing using non-volatile memory cells as computational units. Assuming a functional fault model, we develop methods to generate pseudorandom and structured test patterns to detect hardware faults. We also develop a test-sequencing strategy that combines these different classes of tests to achieve high fault coverage. The testing methodology is applied to a broad class of DNNs trained to classify images from the MNIST, Fashion-MNIST, and CIFAR-10 datasets. The goal is to expose hardware faults which may lead to the incorrect classification of images. We achieve an average fault coverage of 94% for these different architectures, some of which are large and complex.

Funder

National Science Foundation

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. WaferCap: Open Classification of Wafer Map Patterns using Deep Capsule Network;2024 IEEE 42nd VLSI Test Symposium (VTS);2024-04-22

2. Online Performance Monitoring of Neuromorphic Computing Systems;2023 IEEE European Test Symposium (ETS);2023-05-22

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