Demonstration of a Frequency Doubler Using a Tunnel Field-Effect Transistor with Dual Pocket Doping

Author:

Kim Jang Hyun1,Kim Hyunwoo2

Affiliation:

1. Department of Electrical and Computer Engineering, Ajou University, Suwon 16499, Republic of Korea

2. Department of Electrical and Electronics Engineering, Konkuk University, Seoul 05029, Republic of Korea

Abstract

In this study, a frequency doubler that consists of a tunnel field-effect transistor (TFET) with dual pocket doping is proposed, and its operation is verified using technology computer-aided design (TCAD) simulations. The frequency-doubling operation is important to having symmetrical current characteristics, which eliminate odd harmonics and the need for extra filter circuitry. The proposed TFET has intrinsically bidirectional and controllable currents that can be implemented by pocket doping, which is located at the junction between the source/drain (S/D) and the channel region, to modify tunneling probabilities. The source-to-channel (ISC) and channel-to-drain currents (ICD) can be independently changed by managing each pocket doping concentration on the source and drain sides (NS,POC and ND,POC). After that, the current matching process was investigated through NS,POC and ND,POC splits, respectively. However, it was found that the optimized doping condition achieved at the device level (namely, a transistor evaluation) is not suitable for a frequency doubler operation because the voltage drop generated by a load resistor in the frequency doubler circuit configuration causes the currents to be unbalanced between ISC and ICD. Therefore, after symmetrical current matching was performed by optimizing NS,POC and ND,POC at the circuit level, it was clearly seen that the output frequency was doubled in comparison to the input sinusoidal signal. In addition, the effects of the S/D and pocket doping variations that can occur during process integration were investigated to determine how much frequency multiplications are affected, and these variations have the immunity of S/D doping and pocket doping length changes. Furthermore, the impact of device scaling with gate length (LG) variations was evaluated. Based on these findings, the proposed frequency doubler is anticipated to offer benefits for circuit design and low-power applications compared to the conventional one.

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering

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