Affiliation:
1. Department of Electrical and Computer Engineering, Inha University, Incheon 22212, Republic of Korea
2. Department of System Semiconductor Engineering, Sangmyung University, Cheonan 31066, Republic of Korea
Abstract
Recently, with the development of automobile technologies such as advanced driver assistance systems (ADASs), the performance and number of cameras and displays required for a vehicle have significantly increased. Therefore, the need for in-vehicle high-speed data transmission has increased, but there is difficulty in handling the required high-speed data transmission in existing in-vehicle networks. The MIPI A-PHY interface for automobiles has been proposed as a new standard to solve this issue. To ensure data transmission in noisy automotive environments, the A-PHY interface contains an added retransmission (RTS) layer within the new physical layer. In this paper, we propose and design in detail the structure of an RTS layer presented in the standard A-PHY interface. The proposed RTS layer was designed to satisfy the RTS specification of the MIPI A-PHY standard and was verified through simulations. Moreover, the A-PHY SerDes environment was configured in an FPGA using a Xilinx KC705 FPGA development board and an FPGA Mezzanine Card (FMC) loopback module, and RTS layer operation was verified through the process of transmitting video data to the A-Packet. The A-PHY interface with the RTS layer designed on the FPGA uses 3924 LUTs, 2019 registers, and 132 block memories and operates at a maximum speed of 200 MHz. In addition, as a result of designing the A-PHY interface as an ASIC implementation using the Synopsys SAED 28 nm process, the number of logic gates is 25 K, the chip area is 0.40 mm2, and the maximum operating speed is 200 MHz.
Funder
Ministry of Science and ICT
National Research Foundation of Korea
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering
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