Parasitic-Aware Simulation-Based Optimization Design Tool for Current Steering VGAs

Abstract

Designing millimeter-wave variable gain amplifiers (VGAs) is very challenging owing to the parasitic effects of the interconnects of both active and passive devices. An automated parasitic-aware optimization RF design tool is proposed in this paper to address this challenge. The proposed tool considers the parasitic effects prior to layout. It employs a knowledge-aware optimization technique. The augmentation between parasitic-aware and knowledge-aware techniques speeds up the design process and leads to a design as close to the final design after finalizing the layout. The proposed tool gives limitless and guaranteed converged solutions in a wide range of RF frequencies. A four-bits current steering VGA design is used as a validation of the tool. The tool is tested on three different frequencies using the 65 nm-technology node. The three tested frequencies (7, 10, and 13 GHz) show a root mean square gain error at approximately 0.1 dB and a phase variation at approximately 3.5° within a 16-dB gain control range. To our knowledge, it is the first reported automated design tool for a current steering VGA.