A Low-Power, Fast-Transient FVF-Based Output-Capacitorless LDO with Push–Pull Buffer and Adaptive Resistance Unit

Abstract

An output-capacitorless low-dropout regulator (LDO) with a push–pull buffer was presented in this paper. The proposed push–pull buffer was able to provide a large charge and discharge current to increase the slew rate at the gate of the power transistor effectively, thereby improving the transient response of this LDO. In addition, an adaptive resistance unit (ARU) was proposed to solve the right half-plane zero problem caused by Miller compensation to optimize the loop stability of the LDO. The proposed LDO was implemented in a 0.18-µm CMOS technology. Simulation results showed that the quiescent current of this LDO was only 16.1 µA. It regulated the output at 1.5 V from a 1.8 V supply, with a dropout voltage of 300 mV at the maximum output current of 50 mA. The maximum value of the voltage spike was 129 mV. Additionally, the recovery time of the LDO was 0.2 µs.