Dynamic Current-Limitation Strategy of Grid-Forming Inverters Based on SR Latches

Abstract

A grid-forming (GFM) inverter can effectively support active power and reactive power, and the stability problem induced by the low inertia can be thereby alleviated in a power electronics-dominated power system. Yet, the voltage source characteristic presented by the grid-forming inverter induces an overcurrent problem during a short-circuit fault. Furthermore, the time delay induces an inrush current in traditional digital control, triggered by a predefined timing sequence. To address the overcurrent problem of the GFM inverter controlled by the digital controller, the operation characteristics of GFM inverters under grid-voltage drops are investigated, and a mathematical model of the instantaneous fault current is established, which depicts the relationship between the instantaneous fault current’s magnitude, grid-voltage drop severity, equivalent output impedance, and current inner-loop response speed. Then, a Set–Reset (SR) latch-based dynamic current limitation with event-triggered control is proposed for the low-voltage ride-through of the GFM inverter. In the proposed method, the current limitation is enabled during grid fault, and the active and reactive powers can be recovered rapidly after fault clearance. Meanwhile, the active and reactive power references are designed to enhance synchronization stability during the grid fault. The proposed method addresses the issue of the repeated switching of virtual impedance during grid fault and achieves rapid power recovery after fault clearance. In addition, the proposed method uses the logic of event triggers to respond to the overcurrent event in real time and realize overcurrent protection. The simulation and experimental results demonstrate the effectiveness of the proposed method in current limitation and active-power recovery after fault clearance.