A Capacitive-Feedback Amplifier with 0.1% THD and 1.18 μVrms Noise for ECG Recording

Abstract

This paper presents an amplifier with low noise, high gain, low power consumption, and high linearity for electrocardiogram (ECG) recording. The core of this design is a chopper-stabilized capacitive-feedback operational transconductance amplifier (OTA). The proposed OTA has a two-stage structure, with the first stage using a combination of current reuse and cascode techniques to obtain a large gain at low power and the second stage operating in Class A state for better linearity. The amplifier additionally uses a DC servo loop (DSL) to improve the rejection of DC offsets. The amplifier is implemented in a standard 0.13 μm CMOS process, consuming 1.647 μA current from the supply voltage of 1.5 V and occupying an area of 0.97 mm2. The amplifier has a 0.5 Hz to 6.1 kHz bandwidth and 59.7 dB gain while having no less than a 65 dB common-mode rejection ratio (CMRR). The amplifier’s total harmonic distortion (THD) is less than 0.1% at 800 mVpp output. The amplifier can provide a noise level of 1.18 μVrms in the 0.5 Hz to 500 Hz bandwidth that the ECG signal is interested in and has 3.38 μVrms input-referred noise (IRN) over the entire bandwidth, so its noise efficiency factor (NEF) is 2.13.