CMOS Analogue Velocity-Selective Neural Processing System

Abstract

Velocity-selective recording (VSR) of electroneurogram (ENG) signals is a frequently utilized technology in the field of neural recording with applications in clinical medicine and neuroprosthetics. VSR classifies excited axon populations in terms of their conduction velocities using multiple recordings of the same ENG signal and addition of the recording channels after introducing controlled time delays. This paper describes the first fully integrated analogue realization of the complete delay-and-add process with nine channels. The proposed approach uses switched-capacitor (SC) circuits and avoids the need for ADCs at the inputs of the delay-and-add circuit to achieve a small size and low power implementation. Simulated and measured results obtained from chips fabricated in 0.35 µm CMOS technology are reported. The system occupies a 1.16 mm2 active area and consumes 798 µW from a 3 V supply, while achieving a wide velocity detection range of 10–300 m/s with a precise relative velocity resolution down to 0.003. Intrinsic velocity spectra measured from synthetic ENG inputs confirm the operation of the system.