CMOS Tunable Pseudo-Resistor with Low Harmonic Distortion-Reference-Cited by-同舟云学术

CMOS Tunable Pseudo-Resistor with Low Harmonic Distortion

Published:2023-08-08 Issue:16 Volume:12 Page:3376
ISSN:2079-9292
Container-title:Electronics
language:en
Short-container-title:Electronics

Author:

Molinar-Solis Jesus E.¹,Padilla-Cantoya Ivan²^ORCID,Ocampo-Hidalgo Juan J.³^ORCID,Sandoval-Perez Sergio¹^ORCID,Rivera-Mejia Jose¹

Affiliation:

1. Electronics Department, Tecnologico Nacional de Mexico/ITCG-ITCH, Ciudad Guzman 49100, Jalisco, Mexico

2. Electro-Photonics Department, Universidad de Guadalajara, Guadalajara 44160, Jalisco, Mexico

3. Electronics Department, Universidad Autonoma Metropolitana, Ciudad de Mexico 02128, Mexico

Abstract

In this work, a tunable pseudo-resistor was designed, simulated, and tested using a 0.35 µm CMOS technology. The proposal used a compact voltage bias circuit free of body-effect, allowing a constant resistance value over the pseudo-resistor’s dynamic range, improving its linearity. A fabricated cell was characterized providing a resistance value from 300 kΩ to 10 GΩ with a THD from <2.5% to 1 GΩ. Additionally, the pseudo-resistor was incorporated into a high-pass OTA filter showing a THD below 0.2% for input voltages in the range ≤ 0.3 Vp. The simulations were compared with experimental measurements in a CMOS-fabricated cell, which verified the proposal’s feasibility.

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering

Link

https://www.mdpi.com/2079-9292/12/16/3376/pdf

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