A 12 μW 10 kHz BW 58.9 dB SNDR AC-Coupled Incremental ADC for Neural Recording

Abstract

This paper presents an AC-coupled, incremental analog-to-digital converter (ADC) based on two-step quantization for high-density implantable neural recording. It achieves a rail-to-rail electrode DC offset (EDO) rejection, low noise, a small area, and low power consumption. Fabricated in a 180 nm CMOS process, the prototype ADC achieves a high input impedance, 24 mVpp linear input range, and 58.9 dB signal-to-noise and distortion ratio (SNDR). Its core circuit has a power consumption of 12 μW and an area of 0.0192 mm2. The referred-to-input (RTI) noise is 6.9 μVrms within the bandwidth of 1 Hz–10 kHz.