FPGA-Based Implementation of a Digital Insulin-Glucose Regulator for Type 2 Diabetic Patients

Abstract

This paper reports on the hardware implementation of a digital insulin-glucose regulator for type 2 diabetic patients by using a Field Programmable Gate Array board. For a real time-control of the patient insulin concentration, the insulin-regulator needs to measure only his blood glucose concentration. With respect to other reported solutions using general-purpose programmable hardware’s, the proposed insulin-glucose regulator allows to design a software-free, fully-hardware architecture of the system here described in detail. A prototype has been developed so to validate its functionality in the following two operating modes: (i) in the open loop condition for which only the insulin-glucose regulator is operating; (ii) in the closed loop condition for which the insulin-glucose regulator acting as an artificial pancreas is connected to a population of one hundred virtual patients individuated by employing a comprehensive theoretical model recognized by the U.S. Food and Drug Administration for the pre-clinical validation of glucose control strategies. These virtual patients present the same trend of the variation of the glucose concentration achieving different maximum and minimum values of glucose concentrations when eating a meal. The paper presents and discusses the experimental results by comparing them with those ones obtained by implementing the theoretical model through numerical simulations performed in SIMULINK. Relative errors lower than ±1% have been achieved by performing this comparison so demonstrating a very high accuracy of the proposed insulin-glucose regulator digital system. The implemented hardware solution of the digital controller can process the input data related to the glucose concentration of each virtual patient in about 1.1 μs with an estimated power consumption of about 36 mW. These achievements open the way for further investigations on digital architectures for glucose regulators to be integrated in VLSI as System-on-Chips and/or Lab-on-Chips for portable, wearable, and implantable solutions in real biomedical applications.