1. Lojek, B. (2007). History of Semiconductor Engineering, Springer Science & Business Media.
2. Software Tools [Technology Analysis and Forecast];Trlica;IEEE Spectr.,1997
3. The magic VLSI layout system;Ousterhout;IEEE Des. Test Comput.,1985
4. Wolf, C., Glaser, J., and Kepler, J. (2013, January 10). Yosys-a free Verilog synthesis suite. Proceedings of the 21st Austrian Workshop on Microelectronics (Austrochip), Linz, Austria.
5. Ajayi, T., and Blaauw, D. (2019, January 25–28). OpenROAD: Toward a self-driving, open source digital layout implementation tool chain. Proceedings of the Government Microcircuit Applications and Critical Technology Conference, Albuquerque, NM, USA.