A High-Performance Non-Indexed Text Search System

Author:

Kieu-Do-Nguyen Binh12ORCID,Dang Tuan-Kiet1ORCID,The Binh Nguyen2ORCID,Pham-Quoc Cuong2ORCID,Phuc Nghi Huynh2ORCID,Tran Ngoc-Thinh2ORCID,Inoue Katsumi3,Pham Cong-Kha1ORCID,Hoang Trong-Thuc1ORCID

Affiliation:

1. Department of Computer and Network Engineering, The University of Electro-Communications (UEC), 1-5-1 Chofugaoka, Tokyo 182-8585, Japan

2. Faculty of Computer Science and Engineering, Ho Chi Minh City University of Technology (HCMUT), 268 Ly Thuong Kiet St., Dist. 10, Ho Chi Minh City 740050, Vietnam

3. Advanced Original Technologies Co., Ltd., Academy of Cryptography Techniques, Chiba 277-0827, Japan

Abstract

Full-text search has a wide range of applications, including tracking systems, computer vision, and natural language processing. Standard methods usually implement a two-phase procedure: indexing and retrieving, with the retrieval performance entirely dependent on the index efficiency. In most cases, the more powerful the index algorithm, the more memory and processing time are required. The amount of time and memory required to index a collection of documents is proportional to its overall size. In this paper, we propose a full-text search hardware implementation without the indexing phase, thus removing the time and memory requirements for indexing. Additionally, we propose an efficient design to leverage the parallel architecture of High Bandwidth Memory (HBM). To our knowledge, few (if not zero) researchers have integrated their full-text search system with an effective data access control on HBM. The functionality of the proposed system is verified on the Xilinx Alveo U50 Field-Programmable Gate Array (FPGA). The experimental results show that our system achieved a throughput of 8 Gigabytes per second, about 6697× speed-up compared to other software-based approaches.

Publisher

MDPI AG

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