Mobility Extraction Using Improved Resistance Partitioning Methodology for Normally-OFF Fully Vertical GaN Trench MOSFETs

Author:

Ackermann Valentin12ORCID,Mohamad Blend1,El Rammouz Hala1,Maurya Vishwajeet1,Frayssinet Eric3,Cordier Yvon3ORCID,Charles Matthew1ORCID,Lefevre Gauthier24,Buckley Julien1ORCID,Salem Bassem2ORCID

Affiliation:

1. Univ. Grenoble Alpes, CEA, LETI, F-38000 Grenoble, France

2. Univ. Grenoble Alpes, CNRS, CEA/LETI Minatec, Grenoble INP, LTM, F-38054 Grenoble, France

3. Univ. Côte d’Azur, CNRS, CRHEA, rue Bernard Grégory, 06560 Valbonne, France

4. Univ. Grenoble Alpes CEA, LITEN, F-38000 Grenoble, France

Abstract

In this work, fully vertical GaN trench MOSFETs were fabricated and characterized to evaluate their electrical performances. Transistors show a normally-OFF behavior with a high ION/IOFF (~109) ratio and a significantly small gate leakage current (10−11 A/mm). Thanks to an improved resistance partitioning method, the resistances of the trench bottom and trench channel were extracted accurately by taking into account different charging conditions. This methodology enabled an estimation of the effective channel and bottom mobility of 11.1 cm2/V·s and 15.1 cm2/V·s, respectively.

Funder

Labex GANEXT

French Agence Nationale de la Recherche

French RENATECH network

Publisher

MDPI AG

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