Affiliation:
1. The Key Laboratory of Dynamic Cognitive System of Electromagnetic Spectrum Space, Nanjing University of Aeronautics and Astronautics, Nanjing 211106, China
2. Institute of Sensors, Signals and Systems, Heriot-Watt University, Edinburgh EH14 4AS, UK
Abstract
To address the challenges of complex implementation structures and high hardware resource consumption in multiple-input multiple-output (MIMO) channel emulators, this paper proposes a hardware generation method for spatial–temporal correlated non-stationary channel fading. Firstly, a hardware generation architecture is developed for field-programmable gate array (FPGA) platforms, which can also reduce the complexity of the channel emulator. Secondly, an improved CORDIC method is introduced to reduce algorithm latency and hardware consumption while expanding the function convergence domain, with a relative error maintained at the level of 10-4. Furthermore, based on the idea of time-division multiplexing, an efficient hardware operation of a lower triangular matrix is adopted to minimize the consumption of hardware resources. Finally, the measured results demonstrate that the statistical characteristics of the channel fading generated by the proposed method are in good agreement with the theoretical ones, with an average error of less than 2%. Additionally, under identical simulation conditions, hardware resource consumption is reduced by 6.87%. These findings provide compelling evidence of the enhanced efficiency and accuracy in simulating MIMO channels achieved through the proposed method.
Funder
National Natural Science Foundation of China
Natural Science Foundation of Jiangsu Province
Key Technologies R&D Program of Jiangsu
National Mobile Communications Research Laboratory, Southeast University
Experimental technology research and development
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering