Effects of Fractional Time Delay as a Low-Power True Time Delay Digital Beamforming Architecture

Abstract

True time delay digital beamforming enables large squint-free bandwidths and high beamcounts, ideal for Low Earth Orbit (LEO) satellite communication links. This work proposes a true time delay architecture using Variable Fractional Delay (VFD). True time delay eliminates many analog beamforming performance constraints including inaccurate beam steering and limited beamcounts, while managing system quantization error. This article presents a method of implementing true time delay using a VFD digital filter with sufficient time resolution to minimize quantization error and enable both gigahertz bandwidths and sampling frequencies. Simulations of antenna patterns utilizing the proposed VFD digital filters demonstrate satisfactory LEO beamforming performance with only a 29-tap filter. The VFD filter was implemented using a Xilinx Virtex Ultrascale FPGA and demonstrated a 1077% reduction in dynamic power and a minimum 498% reduction in logic resources, with only a modest increase in multipliers required when compared to Farrow-based architectures previously proposed in the literature.