Fibonacci Group Consensus Algorithm Based on Node Evaluation Mechanisms

Author:

Shen Xueli1,Li Xinru1

Affiliation:

1. School of Software, Liaoning Technical University, Huludao 125105, China

Abstract

In response to challenges posed by the Practical Byzantine Fault Tolerance (PBFT) consensus algorithm, where all nodes are involved in the consensus process, issues such as high communication overhead in the three-phase procedure, random selection of master nodes, and the absence of reward and penalty mechanisms are addressed. This leads to the proposal of a Speculative Practical Byzantine Fault Tolerance (SP-PBFT) consensus algorithm based on a node evaluation mechanism for speculative grouping. Firstly, the consensus protocol was optimized, and a timeout mechanism was proposed to divide the consensus process into an optimistic mode and a pessimistic mode, which reduced the communication overhead under the premise of resisting Byzantine node attacks. Secondly, a node evaluation mechanism was proposed to calculate the node reputation value according to the node’s historical behavior and give the corresponding reward or punishment, which reduced the possibility of malicious nodes participating in the consensus process. Finally, the Fibonacci grouping mechanism was used to reduce the number of nodes participating in the consensus process, fundamentally improving the consensus efficiency, avoiding the problem of centralization of the consensus process caused by the cumulative reputation value of nodes, and improving the enthusiasm of consensus nodes. Simulation experiments using Docker containers to simulate multiple nodes show that the SP-PBFT consensus algorithm proposed in this paper has better performance than the PBFT consensus algorithm and other improved algorithms in terms of consensus delay, throughput, fault tolerance and communication complexity.

Funder

National Natural Science Foundation of China

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering

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