1. FinFET-a self-aligned double-gate MOSFET scalable to 20 nm;Hisamoto;IEEE Trans. Electron Devices,2000
2. Pi-gate soi mosfet;Park;IEEE Electron Device Lett.,2001
3. High performance fully-depleted tri-gate CMOS transistors;Doyle;IEEE Electron Device Lett.,2003
4. Yang, F.-L., Chen, H.-Y., Chen, F.-C., Huang, C.-C., Chang, C.-Y., Chiu, H.-K., Lee, C.-C., Chen, C.-C., Huang, H.-T., and Chen, C.-J. (2002, January 8–11). 25 nm CMOS omega FETs. Proceedings of the Digest International Electron Devices Meeting, San Francisco, CA, USA.
5. Monfray, S., Skotnicki, T., Morand, Y., Descombes, S., Coronel, P., Mazoyer, P., Harrison, S., Ribot, P., Talbot, A., and Dutartre, D. (2022, January 10). 50 nm-gate all around (GAA)-silicon on nothing (SON)-devices: A simple way to co-integration of GAA transistors within bulk MOSFET process. Proceedings of the 2002 Symposium on VLSI Technology, Kyoto, Japan. Digest of Technical Papers (Cat. No. 01CH37303).