Affiliation:
1. Barcelona Supercomputing Center (BSC), 08034 Barcelona, Spain
2. Microelectronics & Electronic Systems Department, Universitat Autònoma de Barcelona (UAB), 08193 Cerdanyola del Vallès, Spain
3. Institut de Microelectrònica de Barcelona, IMB-CNM (CSIC), 08193 Cerdanyola del Vallès, Spain
Abstract
In the field of embedded systems, energy efficiency is a critical requirement, particularly for battery-powered devices. RISC-V processors have gained popularity due to their flexibility and open-source nature, making them an attractive choice for embedded applications. However, not all RISC-V processors are equally energy-efficient, and evaluating their performance in specific use cases is essential. This paper presents RisCO2, an RISC-V implementation optimized for energy efficiency. It evaluates its performance compared to other RISC-V processors in terms of resource utilization and energy consumption in a signal processing application for nondispersive infrared (NDIR) CO2 sensors.The processors were implemented in the PULPino SoC and synthesized using Vivado IDE. RisCO2 is based on the RV32E_Zfinx instruction set and was designed from scratch by the authors specifically for low-power signal demodulation in CO2 NDIR sensors. The other processors are Ri5cy, Micro-riscy, and Zero-riscy, developed by the PULP team, and CV32E40P (derived from Ri5cy) from the OpenHW Group, all of them widely used in the RISC-V community. Our experiments showed that RisCO2 had the lowest energy consumption among the five processors, with a 53.5% reduction in energy consumption compared to CV32E40P and a 94.8% reduction compared to Micro-riscy. Additionally, RisCO2 had the lowest FPGA resource utilization compared to the best-performing processors, CV32E40P and Ri5cy, with a 46.1% and a 59% reduction in LUTs, respectively. Our findings suggest that RisCO2 is a highly energy-efficient RISC-V processor for NDIR CO2 sensors that require signal demodulation to enhance the accuracy of the measurements. The results also highlight the importance of evaluating processors in specific use cases to identify the most energy-efficient option. This paper provides valuable insights for designers of energy-efficient embedded systems using RISC-V processors.
Funder
Catalan Government industrial Ph.D. programme
Spanish Ministry of Science, Innovation, and Universities
Catalan Government Research Group
Subject
Electrical and Electronic Engineering,Mechanical Engineering,Control and Systems Engineering
Reference18 articles.
1. Asanović, K., and Patterson, D.A. (2014). Instruction Sets Should Be Free: The Case for RISC-V, EECS Department, University of California. Technical Report UCB/EECS-2014-146.
2. Kaur, K., and Kaur, K. (2016, January 3–5). A study of power management techniques for Internet of Things (IoT). Proceedings of the 2016 International Conference on Electrical, Electronics, and Optimization Techniques (ICEEOT), Chennai, India.
3. Popa, D., and Udrea, F. (2019). Towards integrated mid-infrared gas sensors. Sensors, 19.
4. A novel solid-state non-dispersive infrared CO2 gas sensor compatible with wireless and portable deployment;Gibson;Sensors,2013
5. Near-threshold RISC-V core with DSP extensions for scalable IoT endpoint devices;Gautschi;IEEE Trans. Very Large Scale Integr. (VLSI) Syst.,2017
Cited by
2 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Design of a 32-bit Datapath for a Reduced Instruction Set Computers (RISC) Implementation using the DE0-nano FPGA;2024 16th International Conference on Computer and Automation Engineering (ICCAE);2024-03-14
2. A RISC-V-based SoC for pedestrian navigation system;2024 International Conference on Electronic Engineering and Information Systems (EEISS);2024-01-13