An Extended Range Divider Technique for Multi-Band PLL

Author:

Shaik Peerla Rizwan1ORCID,Dutta Ashudeb1,Sahoo Bibhu Datta2ORCID

Affiliation:

1. Department of Electrical Engineering, Indian Institute of Technology, Hyderabad 502205, India

2. Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur 721302, India

Abstract

This paper presents a multiplexer-based extended range multi-modulus divider (ER-MMD) technique for multi-band phase locked loop (PLL). The architecture maintains a modular structure by using conventional 2/3 divider cells and a multiplexer without adding any extra logic circuitry. The area and power overhead is minimal. The 2/3 divider cells are designed using true single phase clock (TSPC) logic for ER-MMD to operate in the sub-10 GHz range. A division range of 2 to 511 is achieved using this logic. The ER-MMD operates at a maximum frequency of 6 GHz with a worst-case current of 625 μA when powered with a 1 V supply. A dual voltage controlled oscillator (VCO), L5/S band PLL for Indian Regional Navigation Satellite System (IRNSS) application is designed, which incorporates an ER-MMD based on the proposed approach as a proof of concept. This technique achieves the best power efficiency of 12 GHz/mW, among the state-of-the-art ER-MMD designs.

Funder

SAMEER

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Simplified Gm − C Filter Technique for Reference Spur Reduction in Phase-Locked Loop;Journal of Low Power Electronics and Applications;2024-03-20

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