Analog System High-Level Synthesis for Energy-Efficient Reconfigurable Computing
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Published:2023-10-26
Issue:4
Volume:13
Page:58
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ISSN:2079-9268
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Container-title:Journal of Low Power Electronics and Applications
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language:en
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Short-container-title:JLPEA
Author:
Ige Afolabi1, Yang Linhao1, Yang Hang1, Hasler Jennifer1ORCID, Hao Cong1
Affiliation:
1. Electrical and Computer Engineering (ECE), Georgia Institute of Technology, Atlanta, GA 30332, USA
Abstract
The design of analog computing systems requires significant human resources and domain expertise due to the lack of automation tools to enable these highly energy-efficient, high-performance computing nodes. This work presents the first automated tool flow from a high-level representation to a reconfigurable physical device. This tool begins with a high-level algorithmic description, utilizing either our custom Python framework or the XCOS GUI, to compile and optimize computations for integration into an Integrated Circuit (IC) design or a Field Programmable Analog Array (FPAA). An energy-efficient embedded speech classifier benchmark illustrates the tool demonstration, automatically generating GDSII layout or FPAA switch list targeting.
Subject
Electrical and Electronic Engineering
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