Affiliation:
1. School of Electrical Engineering and Computer Science, KTH Royal Institute of Technology, 11428 Stockholm, Sweden
Abstract
Various methods have been discussed in the literature regarding enabling the over-current (OC) capability of silicon carbide (SiC) MOSFETs. SiC MOSFETs can operate at up to 250 °C without failure. One of their features is to permit transient operation at elevated temperatures. This is possible if the stress on the gate oxide and packaging can be kept to a level that can be handled. This paper, instead, investigates the potential of enabling the OC capability of SiC MOSFETs by modifying the gate-source voltage. Since the on-state resistance (RDS(on)) of SiC MOSFETs decreases with an increase in the gate voltage (VGS), the conduction losses can be decreased by increasing the VGS. Experiments and simulations have been performed to predict the RDS(on) with the increase in VGS. It is found that the simulation models provided by manufacturers can be used to predict RDS(on) accurately even outside the specifications, hence facilitating the precise estimation of conduction losses. It is also concluded that VGS can be increased during OCs in order to keep the conduction losses within the safety limits. A simple concept for implementing this function on a gate driver is also proposed with the additional functionality of increasing the VGS during OC by measuring the on-state voltage of the MOSFET.
Funder
Hitachi Energy Research and Swedish Energy Agency