Implementation of a reliable mechanism for protecting IP cores on low-end FPGA devices
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Published:2017
Issue:4
Volume:9
Page:337
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ISSN:1741-1068
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Container-title:International Journal of Embedded Systems
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language:en
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Short-container-title:IJES
Author:
Barbareschi Mario,Bagnasco Pierpaolo
Publisher
Inderscience Publishers
Subject
Hardware and Architecture,Software