VLSI architectures for high speed and low power implementation of 5/3 lifting discrete wavelet transform
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Published:2016
Issue:2/3
Volume:12
Page:254
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ISSN:1742-7185
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Container-title:International Journal of Computational Science and Engineering
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language:en
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Short-container-title:IJCSE
Author:
Bhanu N. Usha,Chilambuchelvan A.
Publisher
Inderscience Publishers
Subject
Computational Theory and Mathematics,Computational Mathematics,Hardware and Architecture,Modelling and Simulation,Software