Hierarchical Structure for On-Board-Computer to Achieve High-Reliability and High-Functionality

Author:

TERAKURA Masato,KAKIZAKAI Takehiko,KIMURA Shinichi

Publisher

Japan Society for Aeronautical and Space Sciences

Reference12 articles.

1. 1) Goka, T., Matsumoto, H., Koshiishi, H., Liu, H., Kimoto, Y., Matsuda, S., Imaizumi, M., Kawakita, S., Anzawa, O., Aoyama, K., Tanioka, Y., Ichikawa, S., Sasada, T. and Yamakawa, S. : Space Environment & Effect Measurements From The MDS-1 (Tsubasa) Satellite, Proceedings of International Symposium on Space Technology and Science, Matsue, Japan, ISTS 2002-h-32p, (2002).

2. 2) Kimura, S., Mineno, H., Yamamoto, H., Nagai, Y., Kamimura, H., Kawamoto, S., Terui, F., Nishida, S., S. Nakasuka S., Ukawa, S., Hashimoto, H., Takahashi, N. and Yoshihara K. : Preliminary Experiments on Technologies for Satellite Orbital Maintenance Using Micro-LabSat 1, Advanced Robotics, 18, 2, (2004), pp. 117-138.

3. Single-event performance of COTS-based MPU under flare and non-flare conditions

4. 4) Kimura, S., Terakura, M., Miyasaka, M., Sakamoto, N., Sawada, H. and Funase, R. : A high-performance image acquisition and processing system fabricated using FPGA and free software technologies, 61st International Astronautical Congress Prague, Czech Republic, (2010).

5. Fault-containment in cache memories for TMR redundant processor systems

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