48.1: Inline Low Temperature Polycrystalline Silicon Roughness and Grain Size Metrology Enabled by Electron Beam Review for a Better Process Control of Excimer Laser Annealing

Author:

Meng Lin1,Li Lingjia1,Knaub Nikolai1,Li Xiao1,Li Ji1,Trauner Robert1,Schueler Bernhard1,Huang Shiwen1,Mueller Bernhard1,Daiker Volker1

Affiliation:

1. Applied Materials, Santa Clara, USA; Shanghai, P.R. China Munich Germany

Publisher

Wiley

Subject

General Medicine

Reference11 articles.

1. Polycrystalline silicon thin film transistors;Brotherton S. D.;Semiconductor science and technology,1995

2. Effect of SiO2 Buffer Layer Thickness on Performance and Reliability of Flexible Polycrystalline Silicon TFTs Fabricated on Polyimide;Chen B.-W.;IEEE Electron Device Lett.,2016

3. Hysteresis characteristics in low temperature poly-Si thin film transistors;Chung Hoon-Ju;Journal of Information Display,2005

4. New PMOS LTPS–TFT pixel for AMOLED to suppress the hysteresis effect on OLED current by employing a reset voltage driving;Lee J. H.;Solid-State Electron,2008

5. Hysteresis analysis in excimer-laser-annealed low-temperature polycrystalline-silicon thin-film transistors;Kim Yu-Mi;Journal of the SID 20/7,2012

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