Author:
Padmanabhan T. R.,Bala Tripura Sundari B.
Cited by
4 articles.
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1. Using AIG in Verilog HDL, Autonomous Testing in a Family of Wien Bridge Cross Transducers;2022 5th International Conference on Contemporary Computing and Informatics (IC3I);2022-12-14
2. Using AIG in Verilog HDL, Autonomous Testing in a Family of Wien Bridge Cross Transducers;2022 5th International Conference on Contemporary Computing and Informatics (IC3I);2022-12-14
3. Automatic Fault Detection in a Class of Wheatstone Bridge-based Transducer using ANNs in Verilog HDL;2022 2nd International Conference on Advance Computing and Innovative Technologies in Engineering (ICACITE);2022-04-28
4. Performance Analysis of Embedded System for Data Acquisition on FPGA;Soft Computing in Data Analytics;2018-08-22