An efficient voltage to delay conversion method for DCVSL cells and its application in high speed all‐digital time‐based quantization-Reference-Cited by-同舟云学术

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An efficient voltage to delay conversion method for DCVSL cells and its application in high speed all‐digital time‐based quantization

Published:2019-07-23 Issue:9 Volume:47 Page:1417-1434
ISSN:0098-9886
Container-title:International Journal of Circuit Theory and Applications
language:en
Short-container-title:Int J Circ Theor Appl

Author:

Valiollahi Sepideh¹^ORCID,Ardeshir Gholamreza¹^ORCID

Affiliation:

1. Department of Electrical and Computer EngineeringBabol Noshirvani University of Technology Babol Iran

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1002/cta.2673

Reference20 articles.

1. HenzlerS.Time‐to‐Digital Converters: Springer Series in Advanced Microelectronics 2010.

2. A 0.008-mm2, 35-μW, 8.87-ps-resolution CMOS time-to-digital converter using dual-slope architecture

3. A Fully Digital Front-End Architecture for ECG Acquisition System With 0.5 V Supply

4. Low-power, latch-based multistage time-to-digital converter in 65 nm CMOS technology

5. A Miniature 2 mW 4 bit 1.2 GS/s Delay-Line-Based ADC in 65 nm CMOS

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