A 5.25-V-tolerant bidirectional I/O circuit in a 28-nm CMOS process-Reference-Cited by-同舟云学术

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A 5.25-V-tolerant bidirectional I/O circuit in a 28-nm CMOS process

Published:2014-03-05 Issue:6 Volume:43 Page:822-828
ISSN:0098-9886
Container-title:International Journal of Circuit Theory and Applications
language:en
Short-container-title:Int. J. Circ. Theor. Appl.

Author:

Ahn Keun-Seon¹,Park Jae-Woo²,Yoo Changsik¹

Affiliation:

1. Integrated Circuits Lab. Department of Electronic Engineering; Hanyang University; Seoul Korea

2. SMARTphy Inc.; Seong-Nam City Kyong-Ki-Do Korea

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Reference6 articles.

1. Process integration, devices, and structures International Technology Roadmap for Semiconductors 2011

2. Design of 2xVDD tolerant mixed-voltage I/O buffer against oxide reliability and hot-carrier degradation;Tsai;Microelectronics Reliability,2010

3. Overview and design of mixed-voltage I/O buffers with low-voltage thin-oxide CMOS transistors;Ker;IEEE Transactions on Circuits and Systems-I,2006

4. Annema A-J Geelen G Jong de P 5.5V tolerant I/O in a 2.5V 0.25μm CMOS technology IEEE Custom Integrated Circuits Conference 2000 417 420

5. Ker M-D Lin Y-L. Design of 2xVDD-tolerant I/O buffer with 1xVDD CMOS devices IEEE Custom Integrated Circuits Conference 2009 539 542

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Wireless power charger for wearable medical devices with in-band communication;International Journal of Circuit Theory and Applications;2015-11-02

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