Performance and Stability Analysis of CNTFET SRAM Cell Topologies for Ultra‐Low Power Applications
Author:
Publisher
Wiley
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1002/9781119792581.ch7
Reference29 articles.
1. Vamsi P.N.andSaxena N.K. Design and Analysis of Different Types SRAM Cell Topologies in:Proceedings of IEEE International Conference on Electronics and Communication System p.1060 2015 doi: 10.1109/ECS.2015.7124742.
2. Comparative Analysis of 6T, 7T Conventional CMOS and CNTFET based SRAM Memory Cell Design;Kumar H.;J. Adv. Sci. Eng. Med.,2019
3. Hu C. Device and Technology Impact on Low Power Electronics in:Low Power Design Methodologies J.M. Rabey and M. Pedram (Eds.) Kluwer Academic Publishers Norwell U.S.A. pp. 21–36 1996.
4. Circuit‐level performance benchmarking and scalability analysis of carbon nanotube transistor circuits;Nishant P.;IEEE Trans. Nanotechnol.,2009
5. Power Optimization for SRAM and Its Scaling
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