An efficient wideband cascode class FF−1 Doherty power amplifier with control harmonic impedance inverter for X‐band applications

Abstract

SummaryThis paper presents an efficient Doherty power amplifier (DPA) with optimized harmonic impedance inverter. The proposed design consists of carrier and peaking power amplifiers designed for class F‐ and class F−1‐based operations. Also, multiharmonic non‐uniform stepped‐impedance transmission line‐based input–output matching network is designed for the proposed circuit. The new design maximizes the operating bandwidth by optimizing the control harmonic impedance inverter. The DPA circuit is implemented using the advanced design system simulator, and the chip is made of GaAs 0.25‐μm PHEMT on silicon nitride monolithic microwave integrated circuit die. The fabricated chip exhibits drain efficiency (DE) of 41%–51.5%, power added efficiency of 36.4%–41%, gain of 10.9 dB, and adjacent power leakage ratio of −34.6‐dBc at 30‐dBm peak power. The size of the chip is 2.8 × 1.9 mm2, and it occupies less die area as compared to the existing DPAs.