Formal verification of hardware/software co-designs with translation into representation by state transitions-Reference-Cited by-同舟云学术

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Formal verification of hardware/software co-designs with translation into representation by state transitions

Published:2007 Issue:7 Volume:90 Page:11-19
ISSN:8756-663X
Container-title:Electronics and Communications in Japan (Part II: Electronics)
language:en
Short-container-title:Electron. Comm. Jpn. Pt. II

Author:

Nishihara Tasuku,Matsumoto Takeshi,Komatsu Satoshi,Fujita Masahiro

Publisher

Wiley

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,General Physics and Astronomy

Reference14 articles.

1. , . An environment for hardware/software co-simulation. 29th ACM/IEEE Design Automation Conference, No. 8.1, p 129–134, 1992.

2. , . LusSy: a toolbox for the analysis of systems-on-a-chip at the transactional level. Proc Fifth International Conference on Application of Concurrency to System Design, p 26–35, 2005.

3. , , , . Formal verification of embedded systems based on CFSM networks. 29th ACM/IEEE Design Automation Conference, No. 36.4, p 568–571, 1992.

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