Design of Low-Power and High-Gain CMOS LNA with Current-Reused Topology-Reference-Cited by-同舟云学术

Design of Low-Power and High-Gain CMOS LNA with Current-Reused Topology

Published:2013-07-26 Issue:10 Volume:55 Page:2429-2431
ISSN:0895-2477
Container-title:Microwave and Optical Technology Letters
language:en
Short-container-title:Microw. Opt. Technol. Lett.

Author:

Wang Sen¹,Lin Wen-Jie¹

Affiliation:

1. Department of Electronic Engineering and Graduate Institute of Computer and Communication Engineering; National Taipei University of Technology; No. 1, Sec. 3, Chung-Hsiao E. Rd. Taipei Taiwan

Funder

National Science Council

Chip Implementation Chip

NSC

Publisher

Wiley

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Atomic and Molecular Physics, and Optics,Electronic, Optical and Magnetic Materials

Link

http://onlinelibrary.wiley.com/wol1/doi/10.1002/mop.27889/fullpdf

Reference8 articles.

1. 13 GHz 4.67 dB NF CMOS low-noise amplifier;Gil;Electron Lett,2003

2. K.J. Sun Z.M. Tsai K.Y. Lin H. Wang A 10.8-GHz CMOS low-noise amplifier using parallel-resonant inductor 2007 1795 1798

3. Design of a 9 GHz CMOS low noise amplifier using gain-enhanced technique;Wang;Microwave Opt Tech Lett,2011

4. T.K.K. Tsang M.N. El-Gamal Gain controllable a very low voltage (<1 V) 8-9 GHz integrated CMOS LNAs,” 2002 205 208

5. A 5.7-GHz 0.18-p.m CMOS gain-controlled differential LNA with current reuse for WLAN receiver;Liao;IEEE Microwave Wireless Compon Lett,2003

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