Affiliation:
1. Peter Grünberg Institute (PGI 9) and JARA‐Fundamentals of Future Information Technologies Forschungszentrum Jülich GmbH D‐52428 Jülich Germany
2. CEA‐LETI MINATEC Campus Grenoble F‐38054 France
3. IHP‐Leibniz‐Institut für innovative Mikroelektronik D‐15236 Frankfurt Germany
4. University of Grenoble Alps Grenoble F‐38054 France
Abstract
AbstractAs transistors continue to shrink, the need to replace silicon with materials of higher carrier mobilities becomes imperative. Group‐IV semiconductors, and particularly GeSn alloys, stand out for their high electron and hole mobilities, making them attractive for next‐generation electronics. While Ge p‐channel devices already possess a high hole mobility, here the focus is on enhancing n‐channel transistor performance by utilizing the superior electron mobility of GeSn as channel material. Vertical gate‐all‐around nanowire (GAA NW) transistors are fabricated using epitaxial GeSn heterostructures that leverage the material growth, in situ doping, and band engineering across source/channel/drain regions. It is demonstrated that increasing Sn content in GeSn alloys constantly improves the device performances, reaching a fivefold on‐current improvement over standard Ge devices for 11 at.% Sn content. The present results underline the real potential of the GeSn alloys to bring performance and energy efficiency to future nanoelectronics applications.
Funder
Bundesministerium für Bildung und Forschung