Graphene‐Based Lateral Heterojunctions for 2D Integrated Circuits

Abstract

AbstractA method for patterning single‐layer graphene (SLG) and single‐layer oxidized graphene (SOG) within a continuous atomic layer to form lateral heterojunctions is presented. Raman spectroscopy is employed to investigate the evolution of defect‐related Raman peaks during excimer‐UV irradiation, facilitating the identification of structural changes and defect formation processes. Electrical transport measurements reveal that SOG‐patterned field‐effect transistors (FETs) exhibit varying characteristics depending on the degree of oxidation, thus offering the potential to tailor the electrical properties of graphene devices for specific requirements. Scanning Kelvin probe microscopy measurements reveal the surface potential and work function of the SOG regions compared with those of SLG. The effective functionality of the SOG pattern to operate as a resistor, allowing control of the electrical conductivity in the SOG‐patterned SLG channels, is demonstrated. This capability restricts the current flow while preserving the pristine electrical properties of the graphene channel. Moreover, the SOG pattern can serve as a potential barrier to constructing SLG‐SOG‐patterned integrated circuits, providing exciting opportunities for engineering advanced electronic components. This breakthrough in graphene devices simplifies the fabrication process of graphene‐based FETs and provides the foundation for developing atomically thin integrated circuits for a wide range of applications.