Affiliation:
1. SKKU Advanced Institute of Nanotechnology (SAINT) Sungkyunkwan University Suwon Gyeonggi‐do 16419 Republic of Korea
2. Department of Mechanical Engineering Sungkyunkwan University Suwon 16419 Republic of Korea
3. Department of Semiconductor Convergence Engineering Sungkyunkwan University Suwon 16419 Republic of Korea
Abstract
AbstractBrain‐inspired parallel computing is increasingly considered a solution to overcome memory bottlenecks, driven by the surge in data volume. Extensive research has focused on developing memristor arrays, energy‐efficient computing strategies, and varied operational mechanisms for synaptic devices to enable this. However, to realize truly biologically plausible neuromorphic computing, it is essential to consider temporal and spatial aspects of input signals, particularly for systems based on the leaky integrate‐and‐fire model. This review highlights the significance of neuromorphic computing and outlines the fundamental components of hardware‐based neural networks. Traditionally, neuromorphic computing has relied on two‐terminal devices such as artificial synapses. However, these suffer from significant drawbacks, such as current leakage and the lack of a third terminal for precise synaptic weight adjustment. As alternatives, three‐terminal synaptic devices, including memtransistors, ferroelectric, floating‐gate, and charge‐trapped synaptic devices, as well as optoelectronic options, are explored. For an accurate replication of biological neural networks, it is vital to integrate artificial neurons and synapses, implement neurobiological functions in hardware, and develop sensory neuromorphic computing systems. This study delves into the operational mechanisms of these artificial components and discusses the integration process necessary for realizing biologically plausible neuromorphic computing, paving the way for future brain‐inspired electronic systems.
Funder
Ministry of Education
Ministry of Trade, Industry and Energy
Cited by
1 articles.
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