P‐5.5: An Adaptive Video Scaling System Implementation Based on FPGA-Reference-Cited by-同舟云学术

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P‐5.5: An Adaptive Video Scaling System Implementation Based on FPGA

Published:2021-02 Issue:S1 Volume:52 Page:531-534
ISSN:0097-966X
Container-title:SID Symposium Digest of Technical Papers
language:en
Short-container-title:SID Symposium Digest of Technical Papers

Author:

Wang Chengcheng¹,Cao Yanpeng¹,Tang Yongming¹

Affiliation:

1. Joint International Research Laboratory of Information Display and Visualization, Southeast University Nanjing Jiangsu China

Publisher

Wiley

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1002/sdtp.14545

Reference8 articles.

1. A low-cost high-quality adaptive scalar for real-time multimedia applications;Chen SL;IEEE Transactions on circuits and systems for video technology,2011

2. A novel interpolation chip for real-time multimedia applications;Huang CC;IEEE Transactions on circuits and systems for video technology,2012

3. Implementation of super-resolution scaler for Full HD and 4K video;Okuhata H;In2013 IEEE Third International Conference on Consumer Electronics Berlin (ICCE-Berlin),2013

4. High-performance low-area video upscaling architecture for 4-K UHD video;Lee J;IEEE Transactions on Circuits and Systems II: Express Briefs,2016

5. HDMI video scaling on an all-programmable SoC;Tsai CY;In2016 International Conference On Communication Problem-Solving (ICCP),2016

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