Selective erasable and programmable NAND-type MNOS memory-Reference-Cited by-同舟云学术

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Selective erasable and programmable NAND-type MNOS memory

Published:1992 Issue:10 Volume:75 Page:93-103
ISSN:8756-663X
Container-title:Electronics and Communications in Japan (Part II: Electronics)
language:en
Short-container-title:Electron. Comm. Jpn. Pt. II

Author:

Sato Kazuo,Ueda Kenji,Kojima Makoto,Takata Takashi,Yokozawa Kenji,Morita Michio,Onishi Hideaki

Publisher

Wiley

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,General Physics and Astronomy

Reference19 articles.

1. , , , , , and . N-Channel Silicon Gate MNOS Memory. Shingaku Giho, SSD82-256 (Feb. 1983).

2. Hi-MNOS II technology for a 64-kbit byte-erasable 5-V-only EEPROM

3. , , , , and . A 1-Mbit EEPROM with MONOS memory cell for semiconductor disk application. 1990 Symposium on VLSI Circuit, p. 101 (1990).

4. , , , and , A 16-Kbit electrically erasable nonvolatile memory. Digest of ISSCC '80, p. 464 (1984).

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