DC‐Link Voltage Control Strategy of High‐Gain Bidirectional Quasi‐Z Source Inverter

Abstract

This article presents an improved method combining active disturbance rejection control (ADRC) and sliding mode control (SMC) to address the problem of non‐minimum phase characteristics of high‐gain bidirectional quasi‐Z source inverters. The present study is specifically targeting the robustness of the DC‐link voltage. Firstly, a high‐gain bidirectional quasi‐Z source inverter is proposed, enabling high‐gain and bidirectional energy flow. The operation principle is analyzed, and the topology with non‐minimum phase characteristics is obtained through small signal modeling. To overcome the non‐minimum phase characteristic, the active disturbance rejection control‐sliding mode control (ADRC‐SMC) method is employed to control the DC‐link voltage indirectly by controlling the capacitor voltage. Building upon the principles of ADRC using the FAL function, an improved nonlinear function called HFAL function is proposed. The nonlinear state error feedback law is implemented using a designed sliding‐mode controller that introduces an exponential convergence law. Simulation and experimental results demonstrate the superior robustness of the improved ADRC‐SMC method in controlling the DC‐link voltage of the high‐gain bidirectional quasi‐Z source inverter, effectively avoiding system jitter and enhancing the overall system immunity. © 2023 Institute of Electrical Engineer of Japan and Wiley Periodicals LLC.