Affiliation:
1. Jiangsu Province Key Lab of ASIC Design Nantong University Nantong China
Abstract
SummaryWe propose an equalizer using two capacitors along with a resistor and a cell access network to address the weakness of low equalization power for the flying‐capacitor based equalizer, which integrates the merits of simplicity and reliability in the application of cell‐to‐cell battery equalization. The equalization process is implemented by alternately charging the capacitors from high state of charge (SoC) cell and discharging the capacitors to low SoC cell, where the capacitors are run in parallel in charging and in series in discharging, and the charging or discharging duration is determined by ξ, the multiple of the time constant of the circuit. A protection is also designed to suppress the peak current occurred when initializing the equalizer due to the zero‐boot voltage of the capacitor. Theoretical analysis shows that the equalization power, which is governed by the lumped resistance of equalization path and ξ, can range from less than 1 W to greater than 6 W. The battery discharging time increases about 5.14% under constant current of 0.5 C in the experimental test. Additional advantage of our equalizer is its operating frequency as low as several Hz, which benefits hardware implementations. The equalizer can attain high equalization power through simple capacitors and a regulating resistor, which is suitable to be used for industrial applications.
Subject
Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials
Cited by
1 articles.
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