Affiliation:
1. Department of Electrical Engineering and Green Technology Research Center, College of Engineering; Chang Gung University; Guishan Dist. Taoyuan City Taiwan
Subject
Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials
Reference18 articles.
1. An all-analog multiphase delay-locked loop using a replica delay line for wide-range operation and low-jitter performance;Moon;IEEE Journal of Solid-State Circuits,2000
2. A wide range delay-locked loop with a fixed latency of one clock cycle;Chang;IEEE Journal of Solid-State Circuits,2002
3. A programmable edge-combining DLL with a current-splitting charge pump for spur suppression;Liao;IEEE Trans. Circuits and Systems II: Express Briefs,2010
4. Jasielski J Kuta S Machowski W Kolodziejski W An Analog Dual Delay Locked Loop Using Coarse and Fine Programmable Delay Elements Proceedings of the 20th International Mixed Design of Integrated Circuits and Systems (MIXDES) 2013 185 190
5. A wide-range and fast-locking all-digital cycle-controlled delay-locked loop;Chang;IEEE Journal of Solid-State Circuits,2005
Cited by
7 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献