Novel Low‐Latency T‐Latch with Minimum Number of Cells in QCA Technology
Author:
Affiliation:
1. Electrical Engineering Department, Faculty of Engineering and Technology University of Mazandaran Babolsar 4741613534 Iran
2. Department of Electrical Engineering Mazandaran University of Science and Technology Babol 4716685635 Iran
Publisher
Wiley
Subject
Multidisciplinary,Modeling and Simulation,Numerical Analysis,Statistics and Probability
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1002/adts.202200686
Reference24 articles.
1. Designing High Speed Sequential Circuits by Quantum-Dot Cellular Automata: Memory Cell and Counter Study
2. Design of an Efficient Multilayer Arithmetic Logic Unit in Quantum-Dot Cellular Automata (QCA)
3. Using D flip-flop with reset terminal to design PFD in QCA nanotechnology
4. QCA-Based RAM Design Using a Resilient Reversible Gate with Improved Performance
5. Efficient Quantum Dot Cellular Automata Memory Architectures Based on the New Wiring Approach
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1. Asynchronous counter in QCA technology using novel D flip-flop;The European Physical Journal Plus;2024-04-25
2. Novel multiplexer, latch, and shift register in QCA nanotechnology for high-speed computing systems;The European Physical Journal Plus;2024-03-16
3. 基于量子点元胞自动机的低能耗、高速度和高效面积时序电路: T型锁存器和计数器研究;Frontiers of Information Technology & Electronic Engineering;2023-03
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