ADD: Accelerator Design and Deploy ‐ A tool for FPGA high‐performance dataflow computing

Author:

C. Penha Jeronimo12ORCID,B. Silva Lucas13,M. Silva Jansen1,Coelho Kristtopher K.13,P. Baranda Hector1,M. Nacif José Augusto3,S. Ferreira Ricardo1

Affiliation:

1. Computer Science DepartmentUniversidade Federal de Viçosa Minas Gerais Brazil

2. Computer Science and Mechanical Engineering Department, Leopoldina CampusCentro Federal de Educação Tecnológica de Minas Gerais Minas Gerais Brazil

3. Science and Technology Institute, UFV‐Florestal CampusUniversidade Federal de Viçosa Minas Gerais Brazil

Funder

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior

Fundação de Amparo à Pesquisa do Estado de Minas Gerais

Conselho Nacional de Desenvolvimento Científico e Tecnológico

Fundação Arthur Bernardes

Intel Corporation

Nvidia

Synopsys

Publisher

Wiley

Subject

Computational Theory and Mathematics,Computer Networks and Communications,Computer Science Applications,Theoretical Computer Science,Software

Reference36 articles.

1. GuptaPK.Accelerating datacenter workloads. Paper presented at: 26th International Conference on Field Programmable Logic and Applications Keynote;2016;Lausanne Switzerland.http://www.fpl2016.org/slides/Gupta -- Accelerating Datacenter Workloads.pdf

2. ColangeloP LuebbersE HuangR MargalaM NealisK.Application of convolutional neural networks on Intel®/Xeon® processor with integrated FPGA. Paper presented at: 2017 IEEE High Performance Extreme Computing Conference (HPEC);2017;Waltham MA.

3. PutnamA CaulfieldAM ChungES et al.A reconfigurable fabric for accelerating large‐scale datacenter services. Paper presented at: 2014 ACM/IEEE 41st International Symposium on Computer Architecture (ISCA);2014;Minneapolis MN.

4. Services Amazon Web.EC2: elastic compute cloud.http://aws.amazon.com/ec2/

5. Di TucciL RabozziM StornaiuoloL SantambrogioMD.The role of CAD frameworks in heterogeneous FPGA‐based cloud systems. Paper presented at: 2017 IEEE International Conference on Computer Design (ICCD);2017;Boston MA.

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1. Gene regulatory accelerators on cloud FPGA;Concurrency and Computation: Practice and Experience;2023-05-29

2. Fast flow cloud: A stream dataflow framework for cloud FPGA accelerator overlays at runtime;Concurrency and Computation: Practice and Experience;2022-03-27

3. RESHAPE: A Run-Time Dataflow Hardware-Based Mapping for CGRA Overlays;2021 IEEE International Symposium on Circuits and Systems (ISCAS);2021-05

4. Google Colab CAD4U: Hands-On Cloud Laboratories for Digital Design;2021 IEEE International Symposium on Circuits and Systems (ISCAS);2021-05

5. Foreword to the special issue of the workshop on high performance computing systems (XVIII Simpósio em Sistemas Computacionais de Alto Desempenho, WSCAD 2017);Concurrency and Computation: Practice and Experience;2019-05-07

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